H.B. Diab and M. Al-Khalidy (Lebanon)
Reconfigurable systems, IPv6, Routing, MorphoSys, Performance analysis, Parallel processing.
Research in reconfigurable computing [1]-[2] is becoming more pronounced with the increasing research effort being invested in this area. By placing the computationally intense portions of an application onto the reconfigurable hardware, that application can be greatly accelerated. Reconfigurable computers offer a compromise between the performance advantages of fixed-functionality hardware and the flexibility of software-programmable substrates. This paper presents a mapping of router as well as host routing algorithms pertaining to the IPv6 protocol on the MorphoSys[3], a reconfigurable system that has 64 processing cells potentially operating in parallel. Results proved that Morphosys achieves higher performance by 2 to 4-fold than some available routers.
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