K.L. Chua (Malaysia)
Adder, Chinese abacus adder, multiplier
This paper describes the fastest abacus adder with modified parallel addition module. The Chinese abacus adder was previously presented using shift-up module and parallel addition module that compose thermometric conversion. In this paper, we present improvement in the parallel addition adder by combining both existing modules without thermometric conversion. The result shows that the speed of 8-bit modified abacus adder architecture is 17% faster than existing parallel addition adder. We compare the adder in terms of delay by using Altera Quartus II tool. Altera Cyclone II device is applied for synthesis and simulation of the adder.
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